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Coverage Options In Compile/Simulation
一、基本Option
Option | description |
-cm line+cond+fsm+tgl+branch+assert | line : Enable collecting line or statement coverage |
-cm_libs yv | yv :Enable collecting coverage source code from Verilog libraries |
-cm_dir $directory_path_name | Specify an name and location for simv.vdb Default is simv.vdb |
-cm_log $filename | Specify a log file for monitoring coverage. Default is cm.log. To suppress the log file, you could re-direct the log file to empty path. (ex, -cm_log /dev/null) |
-cm_name $testname | Specify a different location for different simulation, used in dsim flow |
-cm_hier $filename | Collect particular instances' coverage $filename contents |
-cm_assert_hier $filename | Collect particular assertion' coverage $filename contents |
-cm_line contassign | Specifies enabling line coverage for Verilog continuous assignments. |
-cm_tgl portsonly | Only monitor port of toggle coverage, remove net and variables monitor in modules. |
二、常见问题及解法
2.1、UCAPI-MAP-SHAPEMISMATCH
When merge vdb files of local simulation to whole chip, you might get the error as following:
“Warning-[UCAPI-MAP-SHAPEMISMATCH] Shape mismatch in mapping”
导致shape mismatch可能有以下几个原因:
- Coverage option mismatch;
- Make sure the coverage-related options are the same for both vdbs.
For example:if one vdb is compiled with –cm_line contassign and the other isn’t, it will cause shape mismatch;
$vcs_cov_opts .= " -cm_line contassign ";
- RTL mismatch;
- Version mismatch;
- Tool bug;
2.2、Condition Coverage收不全的问题
有时候我们在分析Condition Coverage的时候,发现有些含有“&&”和“||”的语句没有收到Condition Coverage,究其原因,是因为Code中除了“&&”、“||”之外还含有其他逻辑符号。此时需要检查VCS Option。实测,按照如下Option run Simulation,可以收全Condition Coverage。
在compile option里面加上-cm_cond full或者-cm_cond allops可以收到所有含有“&&”和“||”的表达式的Coverage数据。但是建议用-cm_cond allops; full会统计很多没必要关心的非逻辑条件,而且拆分的很细,像@(posedge clk or negedge rest)这种都会去统计。
$cov_opts = " -cm line+tgl+cond+fsm+assertion+branch -cm_noconst -cm_line contassign ";
$cov_opts .= " -cm_cond full+tf+for+anywidth ";
注意:不建议使用上面的option,因为如果有full选项的话,有达到的Condition Coverage数据会非常多,并且大多是不需要关心的,推荐使用如下设定:-cm_cond allops
三、 Coverage Merge
3.1、urg merge option详解
cmd | description |
-dir <dir> | Use <dir> as directory for source data; |
-report <dir> | Generate report in <dir> instead of default directory. default report directory is urgReport; |
-metric line | Report line coverage; |
-metric fsm | Report fsm coverage; |
-metric cond | Report cond coverage; |
-metric tgl | Report tgl coverage; |
-metric assert | Report coverage for monitored cover directives, events and assertions; |
-line nocasedef | Exclude case default lines in line coverage |
-tgl portsonly | Only report ports in toggle coverage; |
-elfile <file> | Exclude coverable objects specified in <file> for code/assertion/group coverage; |
-elfilelist <file> | A <file> containing exclusion file names to be loaded; |
-hier <file> | Specify the module definitions,instances,hierarchies,and source files you want to exclude or include for report; |
-format both | Generate both HTML and text reports; |
-show ratios | Show number of covered objects and total number of objects with each score; |
-dbname dirname | Creates a merged database in the directory 'dirname.vdb'. The name of the merged test will be 'test' by default. |
-noreport | Generates only the merged results when used with -dbname; this option does not generate reports |
-mode64 | -full64 | Use 64 bit URG; |
-map <mod> | Report on merging mapped modules coverage; |
-xmlplan | Also report HVP in the XML format; |
3.2、指定收某个Hierarchy的Coverage
- 此时需要用VCS Option: -cm_hier xxx_ip_tree.cfg
- 其中xxx_ip_tree.cfg要按照下面的规则来做
- 如果是指定收某个Hierarchy的Coverage数据:
+tree top.cm_ctrl_top.en_ctrl
+tree top.cm_ctrl_host_top.host_dec
- 如果是指定不收某个Hierarchy的Coverage数据:
-tree top.cm_ctrl_top.en_ctrl
-tree top.cm_ctrl_host_top.host_dec
本文标签: 解法不全VCSconditionCoverage
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