按键信号的边沿检测

边沿检测"/>

按键信号的边沿检测

还是直接上代码

verilog

//边沿检测
//tips：寄存了3个周期再判断
//因为按键是异步信号，先同步处理后再判断
module    edge_check(input    wire            clk,input    wire            wave,           //代表按键按下output    wire            flag_pos,output    wire            flag_neg);reg        [3:0]            bur_wave;  //
    always@(posedge    clk)beginbur_wave <= {bur_wave[2:0] , wave};  ////[3] [2] [1] [0]    把下行给上行，异步信号同步处理//[2] [1] [0] [wave]endassign    flag_pos = (~bur_wave[3])&bur_wave[2];assign    flag_neg = (~bur_wave[2])&bur_wave[3];
endmodule    

testbench文件编写

`timescale        1ns/1ps
//200.1代表200ns 零  1ps
module    edge_check_tb();reg            clk;reg        wave;wire            flag_pos;wire            flag_neg;edge_check    edge_check_inst(.clk            (clk),.wave            (wave),.flag_pos        (flag_pos),.flag_neg        (flag_neg));initial    clk=1;
always    #10    clk=~clk;initial    beginwave=0;#206;wave=1;#206;wave=0;#206;wave=1;#343;wave=0;#206;wave=1;#206;wave=0;#206;wave=1;#436;wave=0;#223;$stop;endendmodule

 仿真波形如图

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