linux内核关闭中断

编程入门 行业动态 更新时间:2024-10-08 13:32:39

linux<a href=https://www.elefans.com/category/jswz/34/1769575.html style=内核关闭中断"/>

linux内核关闭中断

linux内核关闭中断

In the last part we discussed evolution of the interrupt delivery process from the devices in the x86 system (PIC → APIC → MSI), general theory, and all the necessary terminology.

在上一部分中,我们讨论了来自x86系统中的设备(PIC→APIC→MSI),通用理论和所有必要术语的中断传递过程的演变。

In this practical part we will look at how to roll back to the use of obsolete methods of interrupt delivery in Linux, and in particular we will look at Linux kernel boot options:

在这个实际的部分中,我们将研究如何回滚到Linux中使用过时的中断传递方法,尤其是我们将研究Linux内核引导选项:

  • pci=nomsi

    pci = nomsi
  • noapic

    Noapic
  • nolapic

    空腹的

Also we will look at the order in which the OS looks for interrupt routing tables (ACPI/MPtable/$PIR) and what the impact is from the following boot options:

此外,我们还将研究操作系统寻找中断路由表(ACPI / MPtable / $ PIR)的顺序,以及以下引导选项的影响:

  • pci=noacpi

    pci = noacpi
  • acpi=noirq

    acpi = noirq
  • acpi=off

    acpi = off

You've probably used some combination of these options when one of the devices in your system hasn't worked correctly because of an interrupt problem. We'll go through these options and find out what they do and how they change the kernel '/proc/interrupts' interface output.

当系统中的某个设备由于中断问题而无法正常工作时,您可能已经使用了这些选项的某种组合。 我们将研究这些选项,并找出它们的作用以及它们如何更改内核“ / proc / interrupts”接口的输出。

无需任何额外选项即可启动 (Boot without any extra options)

In this article for our interrupt investigation we will be using custom board with the Intel Haswell i7 CPU with the LynxPoint-LP chipset which runs coreboot.

在本文中进行中断调查时,我们将结合使用带有Hascore i7 CPU和LynxPoint-LP芯片组(运行coreboot)的定制板。

We will be getting information about interrupts in the Linux system through the command:

我们将通过以下命令获取有关Linux系统中中断的信息:

cat /proc/interrupts

Here is the output when the kernel was booted without any external options:

这是在没有任何外部选项的情况下启动内核时的输出:

CPU0      CPU1      CPU2      CPU3       0:        15         0         0         0   IO-APIC-edge      timer1:         0         1         0         1   IO-APIC-edge      i80428:         0         0         0         1   IO-APIC-edge      rtc0 9:         0         0         0         0   IO-APIC-fasteoi   acpi 12:         0         0         0         1   IO-APIC-edge           23:        16       247         7        10   IO-APIC-fasteoi   ehci_hcd:usb156:         0         0         0         0   PCI-MSI-edge      aerdrv,PCIe PME57:         0         0         0         0   PCI-MSI-edge      aerdrv,PCIe PME58:         0         0         0         0   PCI-MSI-edge      aerdrv,PCIe PME59:         0         0         0         0   PCI-MSI-edge      aerdrv,PCIe PME60:         0         0         0         0   PCI-MSI-edge      aerdrv,PCIe PME61:         0         0         0         0   PCI-MSI-edge      aerdrv,PCIe PME62:      3118      1984       972      3454   PCI-MSI-edge      ahci   63:         1         0         0         0   PCI-MSI-edge      eth5964:      2095        57         4       832   PCI-MSI-edge      eth59-rx-065:         6        18         1      1309   PCI-MSI-edge      eth59-rx-166:        13       512         2         1   PCI-MSI-edge      eth59-rx-267:        10        61       232         2   PCI-MSI-edge      eth59-rx-368:       169         0         0         0   PCI-MSI-edge      eth59-tx-069:        14        14         4       205   PCI-MSI-edge      eth59-tx-170:        11       491         3         0   PCI-MSI-edge      eth59-tx-271:        20        19       134        50   PCI-MSI-edge      eth59-tx-372:         0         0         0         0   PCI-MSI-edge      eth5873:         2         1         0       152   PCI-MSI-edge      eth58-rx-074:         3       150         2         0   PCI-MSI-edge      eth58-rx-175:         2        34       117         2   PCI-MSI-edge      eth58-rx-276:       153         0         2         0   PCI-MSI-edge      eth58-rx-377:         4         0         2       149   PCI-MSI-edge      eth58-tx-078:         4       149         2         0   PCI-MSI-edge      eth58-tx-179:         4         0       117        34   PCI-MSI-edge      eth58-tx-280:       153         0         2         0   PCI-MSI-edge      eth58-tx-381:        66       106         2       101   PCI-MSI-edge      snd_hda_intel82:       928      5657       262       224   PCI-MSI-edge      i91583:       545        56        32        15   PCI-MSI-edge      snd_hda_intel
NMI:         0         0         0         0   Non-maskable interrupts
LOC:      4193      3644      3326      3499   Local timer interrupts
SPU:         0         0         0         0   Spurious interrupts
PMI:         0         0         0         0   Performance monitoring interrupts
IWI:       290       233       590       111   IRQ work interrupts
RTR:         3         0         0         0   APIC ICR read retries
RES:      1339      2163      2404      1946   Rescheduling interrupts
CAL:       607       537       475       559   Function call interrupts
TLB:       163       202       164       251   TLB shootdowns
TRM:        48        48        48        48   Thermal event interrupts
THR:         0         0         0         0   Threshold APIC interrupts
MCE:         0         0         0         0   Machine check exceptions
MCP:         3         3         3         3   Machine check polls
ERR:         0
MIS:         0

File '/proc/interrupts' is the procfs Linux interface to the interrupt subsystem, and it presents a table about the number of interrupts on every CPU core in the system in the following form:

文件“ / proc / interrupts”是中断子系统的procfs Linux接口,它以以下形式显示有关系统中每个CPU内核上的中断数的表:

  • First column: interrupt number

    第一列:中断号
  • CPUx columns: interrupt counters for every CPU core in the system

    CPUx列:系统中每个CPU内核的中断计数器
  • Next column: interrupt type:

    下一栏:中断类型:

    • IO-APIC-edge — edge-triggered interrupt for the I/O APIC controller

      IO-APIC-edge — I / O APIC控制器的边沿触发中断
    • IO-APIC-fasteoi — level-triggered interrupt for the I/O APIC controller

      IO-APIC-fasteoi — I / O APIC控制器的级别触发的中断
    • PCI-MSI-edge — MSI interrupt

      PCI-MSI-edge — MSI中断
    • XT-PIC-XT-PIC — interrupt for the PIC controller (we will see it later)

      XT-PIC-XT-PIC — PIC控制器的中断(我们将在以后看到)
  • Last column: device (driver) associated with this interrupt

    最后一列:与此中断关联的设备(驱动程序)

Everything here is like it is supposed to be in the modern system. For the devices and drivers which support MSI/MSI-X, this is the type of interrupt that they use. The rest of the interrupt routing is done through the APIC controller.

这里的一切就像应该在现代系统中一样。 对于支持MSI / MSI-X的设备和驱动程序,这是它们使用的中断类型。 其余的中断路由是通过APIC控制器完成的。

Simplistically, the interrupt routing schematics can be drawn like this: (red lines are active routing paths and black lines are unused routing paths)

简单地说,中断路由原理图可以这样绘制:(红线是活动的路由路径,黑线是未使用的路由路径)

A device that supports MSI/MSI-X interrupts should have that particular capability listed in its PCI configuration space.

支持MSI / MSI-X中断的设备应具有其PCI配置空间中列出的特定功能。

As an example of that let's look at a little fragment of the lspci output for the devices that declare they use MSI/MSI-X. In our case it is a SATA controller (interrupt 'ahci'), two ethernet controllers (interrupts 'eth58*' and 'eth59*'), graphical controller ('i915'), and two HD Audio controllers ('snd_hda_intel').

例如,让我们看一下声明它们使用MSI / MSI-X的设备的lspci输出的一小部分。 在我们的例子中,它

更多推荐

linux内核关闭中断

本文发布于:2024-02-07 09:47:41,感谢您对本站的认可!
本文链接:https://www.elefans.com/category/jswz/34/1756010.html
版权声明:本站内容均来自互联网,仅供演示用,请勿用于商业和其他非法用途。如果侵犯了您的权益请与我们联系,我们将在24小时内删除。
本文标签:内核   linux

发布评论

评论列表 (有 0 条评论)
草根站长

>www.elefans.com

编程频道|电子爱好者 - 技术资讯及电子产品介绍!